1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to semiconductor chip circuit board or substrate underfill anchor structures and to methods of making the same.
2. Description of the Related Art
Flip-chip mounting schemes have been used for decades to mount semiconductor chips to circuit boards, such as semiconductor chip package substrates. In many conventional flip-chip variants, a plurality of solder joints is established between input/output (I/O) sites of a semiconductor chip and corresponding I/O sites of a circuit board. In one conventional process, a solder bump is metallurgically bonded to a given I/O site or pad of the semiconductor chip and a so-called pre-solder is metallurgically bonded to a corresponding I/O site of the circuit board. Thereafter the solder bump and the pre-solder are brought into proximity and subjected to a heating process that reflows one or both of the solder bump and the pre-solder to establish the requisite solder joint.
Flip-chip solder joints may be subjected to mechanical stresses from a variety of sources, such as coefficient of thermal expansion (CTE) mismatches, ductility differences and circuit board warping. Such stresses can subject the just described conventional solder joints to bending moments. The effect is somewhat directional in that the stresses tend to be greatest nearer the die edges and corners and fall off with increasing proximity to the die center.
To lessen the effects of CTE mismatch, underfill materials are routinely placed between a chip and the underlying package substrate, and more particularly between the chip and a solder resist layer on the package substrate. Like the solder joints, even the underfill may be subjected to bending moments. If severe enough or if the bonding of the underfill to the solder mask is locally weakened, delamination can occur. Underfill delamination can cause cracks to form in the solder joints and ultimately lead to device failure.
One conventional design utilizes a polyimide layer on the semiconductor chip to provide protection for various conductor structures positioned near the outermost surface of a semiconductor chip. Openings are formed in the polyimide layer to lead to the underlying metal structures. Additional openings are formed in the polyimide layer extending through to the semiconductor chip. These additional holes serve as anchor spots for underfill material to inhibit underfill delamination. However, the additional holes render the polyimide layer unsuitable as an etch mask.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.